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Silicon Labs /BGM220SC22WGA /RAC_S /SYLOEN

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Interpret as SYLOEN

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https://regviz.com/r/Silicon Labs/EFR32BG22C224F512GM32/RAC_S/SYLOEN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disable)SYLODIVRLOADCCLK2G4EN 0 (disable)SYLODIVRLO2G4EN 0 (disable)SYLODIVTLO0DBM2G4AUXEN 0 (disable)SYLODIVTLO0DBM2G4EN 0 (disable)SYLODIVTLO6DBM2G4AUXEN 0 (disable)SYLODIVTLO6DBM2G4EN 0 (disable)SYLODIVSGTESTDIVEN

SYLODIVSGTESTDIVEN=disable, SYLODIVTLO6DBM2G4AUXEN=disable, SYLODIVTLO0DBM2G4EN=disable, SYLODIVTLO0DBM2G4AUXEN=disable, SYLODIVRLO2G4EN=disable, SYLODIVRLOADCCLK2G4EN=disable, SYLODIVTLO6DBM2G4EN=disable

Fields

SYLODIVRLOADCCLK2G4EN

SYLODIVRLOADCCLK2G4EN

0 (disable): undefined

1 (enable): undefined
SYLODIVRLO2G4EN

SYLODIVRLO2G4EN

0 (disable): undefined

1 (enable): undefined
SYLODIVTLO0DBM2G4AUXEN

SYLODIVTLO0DBM2G4AUXEN

0 (disable): undefined

1 (enable): undefined
SYLODIVTLO0DBM2G4EN

SYLODIVTLO0DBM2G4EN

0 (disable): undefined

1 (enable): undefined
SYLODIVTLO6DBM2G4AUXEN

SYLODIVTLO6DBM2G4AUXEN

0 (disable): undefined

1 (enable): undefined
SYLODIVTLO6DBM2G4EN

SYLODIVTLO6DBM2G4EN

0 (disable): undefined

1 (enable): undefined
SYLODIVSGTESTDIVEN

SYLODIVSGTESTDIVEN

0 (disable): undefined

1 (enable): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data